This invention relates to a semiconductor device having a side wall film and a method of manufacturing the same.
The conventional semiconductor device will be described below with reference to the drawings. FIG. 7 is a sectional view of the conventional semiconductor device, and FIG. 8 is a plan pattern view of the conventional semiconductor device.
At first, an oxide film is formed over the surface of a semiconductor substrate 101. A portion of the oxide film is further oxidized to form a field oxide film 102, so that the surface region of the semiconductor device is electrically divided into an element forming region and an element isolating region. Next, a polysilicon layer is formed over the surface of the semiconductor substrate, and patterned, using a photolithography process, with use of a mask having a predetermined pattern to form a gate electrode 103 on the element forming region.
Subsequently, ion implantation is performed to dope the element forming region with impurity by using the gate electrode 103 and the field oxide film 102 as a mask in order to form a lightly doped drain region (hereinafter referred to as a "LDD region") 104.
Next, an oxide film 105 is formed over the surface of the semiconductor substrate, that is, on the gate electrode 103, the field oxide film 102, and the semiconductor substrate 101. Subsequently, polysilicon is deposited over the surface of the semiconductor substrate, and then the polysilicon film is etched to form a polysilicon side wall film 106 on the side surface of the gate electrode 103 with the oxide film 105 therebetween.
Next, in order to form source and drain regions 107 and 108 having a high impurity-concentration, the element forming region is doped with impurity by using ion implantation, with the field oxide film 102, the gate electrode 103, and the side wall film 106 as a mask.
Then, an interlayer insulating film 109 is formed over the surface of the semiconductor substrate having the above-mentioned structure thereon. Subsequently, portions of the interlayer insulating film 109 on the source and drain regions 107 and 108 are removed using photolithography to form contact holes 110 and 111 which communicate with the source and drain regions 107 and 108, respectively. Next, a further portion of the interlayer insulating film 109 on an end portion of the extending portion of the gate electrode 103 is also removed to form in the interlayer insulating film 109 a contact hole 112 communicating with the end portion of the gate electrode 103. Then, a metal film is formed by vapor-depositing a metal such as Al over the surface of the semiconductor device. The metal film is then patterned to form metal wirings 113 and 114, which contact the source and drain regions 107 and 108, and the end portion of the gate electrode 103 (shown in FIG. 8) via the contact holes 110, 111, and 112. This step completes the manufacturing process of the conventional semiconductor device.
The polysilicon side wall film 106 formed on the side portion of the gate electrode 103 of the conventional MOS FET (Metal Oxide Semiconductor Field Effect Transistor) is used merely as a mask when the source and drain regions 107 and 108 of the semiconductor device having the LDD structure are formed, and is not used after the LDD structure has been formed.
Simultaneously with the forming of the above-mentioned side wall film of the MOS FET in the semiconductor integrated circuit, a polysilicon side wall film is sometimes formed on the side surface of a resistor layer formed in the same semiconductor integrated circuit. The side wall film on the resistor, however, is incidental, and removal of the side wall film is required. Because an additional manufacturing step is required, the manufacturing process becomes complicated.